GaAs-HBT (Heterojunction Bipolar Transistor) power amplifiers are currently widely used as cellular phone power amplifiers for CDMA (Code Division Multiple Access), etc. FIG. 25, which includes FIGS. 25A and 25B, shows an exemplary circuit of a GaAs-HBT power amplifier module. In FIG. 25A, the GaAs chip is represented by broken lines; the other circuit elements include chip components and transmission lines formed on the module substrate.
Referring to the figure, symbol IN denotes an RF signal input terminal; OUT, an RF signal output terminal; Vc1, the collector power terminal for the first stage transistor; Vc2, the collector power terminal for the last stage transistor; Vcb, the power terminal for the bias circuits for the first and last stage transistors; and Vref, the input voltage terminal for the bias circuits. Further, symbols Tr1 and Tr2 denote heterojunction bipolar transistors; Rb1, Rb2, Rb12, and Rb22, resistances; C1 to C4, C21 to C23, Cd1, Cd2, and Cdb, capacitances; L1 and L2, inductors; and L11 and L21 to L23, transmission lines having a predetermined electrical length and acting as inductors.
FIG. 25B shows the transistor Tr2 and an exemplary detailed circuit configuration of its bias circuit. It should be noted that the transistor Tr1 and its bias circuit are similar, circuit-wise, to Tr2 and its bias circuit. In FIG. 25B, symbols Trb1 to Trb5 denote HBTs; Rbb1 to Rbb6, resistances; Vrefb, the input voltage terminal for the bias circuit (i.e., a terminal for receiving an external reference voltage); Vcb, the collector power terminal for the bias circuit; and Vbo, the output terminal of the bias circuit. This bias circuit operates in such a manner that the idle current of Tr1 or Tr2 (i.e., the bias current at no RF signal input) in the power amplifier is maintained constant over temperature variation. A more detailed description of the operation is disclosed in Japanese Laid-Open Patent Publication No. 2004-343244.
In order to enable the bias circuit of the power amplifier shown in FIG. 25 to operate properly, a reference voltage Vref higher than twice the barrier voltage of the HBTs must be applied to the circuit, since it includes the series connection of the diode-connected stacked transistors Trb4 and Trb5 and the series connection of the last stage transistor Tr2 and the transistor Trb1 in a stacked configuration. That is, in the case where GaAs-based HBTs are used, the reference voltage Vref must be in the range of approximately 2.7 to 2.9 V since the barrier voltage is in the range of approximately 1.25 to 1.30 V and the voltage drop across the resistance Rbb1 is in the range of approximately 0.2 to 0.3 V.
When Vref is reduced to lower than twice the barrier voltage of the HBTs, for example, to 2.5 V, no idle current flows even at normal temperature, that is, the bias circuit shown in FIG. 25 can no longer be practically used. This problem becomes more acute with decrease in temperature, since the barrier voltage, which is determined by the device material, increases as the temperature decreases. Generally, this barrier voltage has a temperature coefficient of approximately −1 to −2 mV/° C.
FIG. 26 shows a bias circuit capable of low voltage operation (namely, operable even when Vref is in the range of 2.4 to 2.5 V) which has been devised to solve the above problem. In this figure, symbols Tr2a and Tr2b denote power transistors; Trb1 to Trb6, bias transistors; Rbb1 to Rbb13, resistances; and C4, Ca, and Cd2, capacitances.
The power transistor Tr2a is driven by two currents supplied through different paths: a first current being directly injected through the resistance Rbb9 (current drive); and a second current being supplied through the emitter follower formed by Trb1 and Trb2 (voltage drive). On the other hand, Tr2b is driven only by the current injected through a path including the resistance Rbb13 (current drive). The use of the bias circuit shown in FIG. 26 allows for power amplification operation at low values of Vref (namely, 2.4-2.5 V). More detailed descriptions of the circuit operation are disclosed in Japanese Laid-Open Patent Publication Nos. 2007-134768 and 2007-318463.
Other related art includes Japanese Laid-Open Patent Publication Nos. 2004-274433, 2006-270146, 2005-217557, and 2009-55096.
Cellular phones are operated primarily at a low or medium output when used in urban areas where base stations are relatively densely located. That is, it is important to improve the efficiency of the low and medium output operation of cellular phones in order to increase the maximum allowable talk time. Recently, it is becoming more and more important to increase the operating efficiency of cellular phones at low and medium output (no more than approximately 18 dBm), as well as at high output (approximately 27 dBm).
One way to improve the efficiency of the low and medium output operation of a cellular phone is to decrease the collector voltage Vc of the amplifier transistor as the output power decreases. In order to sufficiently improve the distortion characteristics of a cellular phone operating at a medium or low output, it is desirable to optimally adjust the idle current of each stage amplifier transistor in accordance with the output power, as described in, e.g., paragraph [0007] of Japanese Laid-Open Patent Publication No. 2009-55096. Therefore, it is desired that the bias circuit be capable of controlling the idle current in accordance with the collector voltage Vc of the amplifier transistor. The present inventor has intensively studied this problem, and found it difficult to enable a GaAs-HBT power amplifier to exhibit satisfactory distortion characteristics during its low or medium output operation if the collector voltage of the amplifier transistors is reduced with the idle current maintained at the same level.